Mrs.SYAMALA KANCHIMANI

Mrs.SYAMALA KANCHIMANI

Assistant Professor

Electronics and Communication Engineering M.Tech. in St. Theressa Institute of Engineering and Technology (VLSI System Design) B.Tech in Electronics and Communication Engineering (GMRIT) M.Tech (VLSI System Design) syamala@aietta.ac.in
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DepartmentElectronics and Communication Engineering
DesignationAssistant Professor
Educational QualificationM.Tech. in St. Theressa Institute of Engineering and Technology (VLSI System Design)
B.Tech in Electronics and Communication Engineering (GMRIT)
SpecializationM.Tech (VLSI System Design)
Area of InterestVLSI, Digital Circuit Design, Embedded Systems
Emailsyamala@aietta.ac.in
QualificationFull FormSpecialization / Details
M.TechMaster of TechnologyVLSI System Design
B.TechBachelor of Technologyin Electronics and Communication Engineering (GMRIT)
Area of Interest—VLSI, Digital Circuit Design, Embedded Systems

Scopus Journals

5 Publications
S.No Name of Publication Link
1 Mobile Based Selfie Sign Language Recognition Using Statistical Features and ANN Classifier, Intelligent Computing and Applications, Smart Innovation Systems and Technologies, pp. 361-375, Scopus Journal, 2023 -
2 Statistical Features Based Selfie Sign Language Recognition System (SSLRS) with ANN Classifier, AIP Conf. Proc. 2794, 020005, Scopus Conference, October 2023 -
3 Learning Global Average Attention Pooling (GAAP) on Resnet50 Backbone for Person Re-Identification Problem, International Journal of Advanced Computer Science and Applications, Vol. 13, No. 7, Scopus Journal, 2022 -
4 Selfie Sign Language Recognition with Shape Energy Features and Mahalanobis Distance Classifier, Advances in Power Systems and Management, pp. 161-168, Scopus Journal, 2021 -
5 Selfie Sign Language Recognition with Shape Energy Features and ANN Classifier, International Journal of Scientific & Technology Research, Vol. 9, Issue 4, pp. 1936-1939, Scopus Journal, April 2020 -

UGC CARE Journals

2 Publications
S.No Name of Publication Link
1 MIMO Simulation for 5G, Volume 14, Issue 5, May 2025, e-ISSN: 2319-8753, p-ISSN: 2347-6710, UGC CARE Journal, 2025 -
2 Smart Wearable Watch for Health Monitoring, Volume 14, Issue 5, May 2025, e-ISSN: 2319-8753, p-ISSN: 2347-6710, UGC CARE Journal, 2025 -

Other / Uncategorized Publications

1 Publication
S.No Name of Publication Link
1 Design a Reconfigurable Arithmetic Logic with Pipelining Using Verilog HDL for FPGA Based Embedded systems, International Journal of Versatile Research and Analysis, Impact Factor: 9.12 by Google Scholar, Paper ID: IJVRA2606502, Volume 4, Issue 6, June-2026, 22-06-2026, 2026 -
Research Profile Researcher ID
Vidwan ID Not Available
ORCID ID 0000-0003-0612-6424
Scopus Author ID Not Available
Google Scholar Profile XoG3NWgAAAAJ
S.NoConference DetailsIndexing
1 Statistical Features Based Selfie Sign Language Recognition System (SSLRS) with ANN Classifier, AIP Conf. Proc. 2794, 020005, October 2023 Scopus Conference, 2023
S.NoTitle of the PatentApplication No.Publication DateView
1 System and method for integrating IOT devices with an instrumentation system using advanced communication protocols 20254106808 A 25/07/2025 —
S.NoTitle of the BookPublisherYear of publicationISSN / ISBN No.View
1 Power Electronics Scientific International Publishing House (SIPH) 2023-2024 978-93-5757-269-9 —
S.NoEvent / Training / Participation
1FDP: Next-Gen Secure Communication Using Quantum Computing Techniques, GVP, VSKP (04-05-2026 to 08-05-2026)
2Faculty Development Program on "NEXT GENERATION COMMUNICATION NETWORKS", AIET in association with BSNL Training Point, VSKP (05-12-2024 to 09-12-2024)
3AICTE Training And Learning (ATAL) Academy FDP on "VLSI Design Innovations for Defence Applications", GMRIT, Rajam (09-12-2024 to 14-12-2024)
4AICTE Training And Learning (ATAL) Academy FDP on "Outlook On Best Practices And Strategies For Chip Design Implementation - From Industry Perspective", GVP, VSKP (16-12-2024 to 21-12-2024)
540 Hours Academy Faculty Development Program on "Unmanned Aerial Systems (UAS): Design, Development, Deployment", NIT Warangal & IIITDM Kurnool in association with AIET (17-03-2025 to 27-03-2025)
6FDP: Recent trends in Embedded systems and IOT, GMRIT, Rajam (27th May to 1st June 2024)
7FDP: Applications in signal processing and communication systems, Gonna College (29th April to 4th May 2024)
8NPTEL Course: Analog and Digital Communications I (Jan-Apr 2026, Elite 66%)
9NPTEL Course: Fundamentals of Semiconductor Devices (Jan-Apr 2025)
10NPTEL Course: Microprocessors and Microcontrollers (Jan-Apr 2024)
11NPTEL Course: Digital System Design (Jan-Apr 2024, Elite 62%)
12NPTEL Course: Analog Communication (July-Oct 2019)
S.No Category Details
1 Professional Membership International Association of Engineers (IAENG) - Life Member - 541862
2 Professional Membership Institute For Educational Research and Publication - Professional Member - 91514161
3 Institute Level AIET, Cherukupally, Vizianagaram (Dist) - Hostel Committee Member (2022 - Till Date
4 Institute Level AIET, Cherukupally, Vizianagaram (Dist) - Admission In-charge (2021 - Till Date
5 Institute Level AIET, Cherukupally, Vizianagaram (Dist) - Grievance Cell Coordinator (2022 - Till Date
6 Department Level AIET, Cherukupally, Vizianagaram (Dist) - 4th Year Overall In-charge (2017 - 2024
7 Department Level AIET, Cherukupally, Vizianagaram (Dist) - Exam Cell In-charge (2025 - Till Date
8 Department Level AIET, Cherukupally, Vizianagaram (Dist) - M.Tech Coordinator (2025 - Till Date
9 Department Level AIET, Cherukupally, Vizianagaram (Dist) - NBA Criteria-8 In-charge (2025 - Till Date
10 Department Level AIET, Cherukupally, Vizianagaram (Dist) - BOS Member (2024 - Till Date
11 Department Level AIET, Cherukupally, Vizianagaram (Dist) - Digital Circuit Design Subject & Lab Syllabus Prepared (2025 - Till Date
12 Department Level AIET, Cherukupally, Vizianagaram (Dist) - Microprocessors and Microcontrollers subject and Lab syllabus prepared (2026 - Till Date
13 Other Information She received her Master Degree in St. Theressa Institute of Engineering and Technology with Specialization in VLSI System Design. She studied B.Tech in Department of Electronics and Communication Engineering, GMR Institute of Technology(A), Rajam, Srikakulam District, Andhra Pradesh, India in the year 2007. She works in Avanthi Institute of Engineering and Technology from 2012. She has a total of 16 Years of Teaching Experience.